Category Attribute Current Near Term Long Term

Fine Line/Space

Inner Layers (Line/Space)

Outer Layers (Line/Space)

3/3 mil

3/4 mil

2.5/2.5 mil

3/3 mil

2/2 mil

2.5/2.5 mil

Buried Core Holes

Mechanical (Drilled Hole/Land)

Laser Drill (Drilled Hole/Land)

5.9/12 mil

N/A

4/10 mil

4/13 mil

2.5/2.5 mil

3.5/8 mil

Special Processing

Controlled Depth Drilling - Blind Vias

Sequential Lamination - Buried Vias

Via in Pad Technology - Silver Epoxy

Via in Pad Technology - Non Conductive Epoxy

Edge Plating

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Materials

High TD - RoHS

Halogen Free

High Performance

Polyimide - High Temp

Teflon

High Speed RF Signals

Yes

Yes

Dk-3.0 Df<0.005

Yes

Yes

Yes

Yes

Yes

Dk<3.0 Df<0.005

Yes

Yes

Yes

Yes

Yes

Dk<3.0 Df<0.002

Yes

Yes

Yes

Through Via Holes

Drilled Hole/Land

Registration to Internal Land

Maximum Copper Plating Aspect Ratio

5.9/12 mil

+/-5.0 mil

15:1.0

4/10 mil

+/-4.5 mil

18:1.0

3.5/8 mil

+/-4.0 mil

20:1.0

Panel / Board

Maximum Layer Count

Maximum Thickness

Maximum Process Panel Size

50 layer

0.40

24" x 30"

60 layer

0.40

24" x 30"

60+ layer

0.40

24" x 30"

Impedance

Single ended & Differential Pair Tolerance

+/- 5%

+/- 5%

+/- 5%

Imbedded Passives

Resistors

Capacitance/Capacitors

N/A

2.0 mil Core

+/- 15%

1.0 mil Core

+/- 10%

Thin Film

Surface Finish

SMOBC

HASL

Lead Free HASL

Electrolytic Hard Gold

Electrolytic Soft Gold

Palladium

Nickel

Carbon Ink

Electroless Ni/Au

Immersion Silver

Immersion Tin

Organic Surface Protection (Entek)

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Yes

Quality Standards

ISO 9001/2000

IPC 6012 Class 1,2,3

TL 9000

Mil-PRF-31032

Yes

Yes

No

No

Yes

Yes

Yes

No

Yes

Yes

Yes

Yes

Sunrise Electronics Roadmap Maintained by:

Sr. Product Engineer

Jigar Patel | JPatel@sunrisepcb.com

847-357-0500